BCD-to-SSD converter

This program implements the binary to seven segment decoder in VHDL.

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity bcd_to_ssd is

port(

x: in std_logic_vector(3 downto 0);

output: out std_logic_vector(6 downto 0));

end bcd_to_ssd;

architecture Behavioral of bcd_to_ssd is

begin

process(x)

begin

  case x is

  when "0000" => output <= "1111110"; --decimal 126

  when "0001" => output <= "0110000"; --decimal 48

  when "0010" => output <= "1101101"; --decimal 109

  when "0011" => output <= "1111001"; --decimal 121

  when "0100" => output <= "0110011"; --decimal 51

  when "0101" => output <= "1011011"; --decimal 91

  when "0110" => output <= "1011111"; --decimal 95

  when "0111" => output <= "1110000"; --decimal 112

  when "1000" => output <= "1111111"; --decimal 127

  when "1001" => output <= "1111011"; --decimal 123

  when others => output <= "1001111";--letter"e"(error)-> decimal 79

  end case;

end process;

end Behavioral;