Address Decoder

This program is an example of decoder using the when else sentence in VHDL.

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library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity address_decoder is

port ( x: in std_logic_vector(2 downto 0);

  y: out std_logic_vector(7 downto 0));

end address_decoder;

architecture Behavioral of address_decoder is

begin

  y <= "00000001" when x = "000" else

  "00000010" when x = "001" else

  "00000100" when x = "010" else

  "00001000" when x = "011" else

  "00010000" when x = "100" else

  "00100000" when x = "101" else

  "01000000" when x = "110" else

  "10000000";

end Behavioral;